Expand description
§STM32F407 MCU Implementation
Contains register definitions, memory maps, and peripheral configurations specific to the STM32F407 microcontroller family.
This module provides base addresses for all peripherals, interrupt numbers, and type-safe register access through the PeripheralAccess trait.
Modules§
Enums§
Constants§
- ADC1_
BASEADDR - ADC2_
BASEADDR - ADC3_
BASEADDR - ADC_
COMMON_ BASEADDR - CAN1_
BASEADDR - CAN2_
BASEADDR - CRC_
BASEADDR - CRYP_
BASEADDR - DAC_
BASEADDR - DBGMCU_
BASEADDR - DCMI_
BASEADDR - DMA1_
BASEADDR - DMA2D_
BASEADDR - DMA2_
BASEADDR - ETH_
DMA_ BASEADDR - ETH_
MAC_ BASEADDR - ETH_
MMC_ BASEADDR - ETH_
PTP_ BASEADDR - EXTI_
BASEADDR - FLASH_
R_ BASEADDR - FMC_
BASEADDR - FSMC_
BASEADDR - GPIOA_
BASEADDR - GPIOB_
BASEADDR - GPIOC_
BASEADDR - GPIOD_
BASEADDR - GPIOE_
BASEADDR - GPIOF_
BASEADDR - GPIOG_
BASEADDR - GPIOH_
BASEADDR - GPIOI_
BASEADDR - GPIOJ_
BASEADDR - GPIOK_
BASEADDR - HASH_
BASEADDR - I2C1_
BASEADDR - I2C2_
BASEADDR - I2C3_
BASEADDR - I2S2EXT_
BASEADDR - I2S3EXT_
BASEADDR - IWDG_
BASEADDR - LTDC_
BASEADDR - PWR_
BASEADDR - RCC_
BASEADDR - RNG_
BASEADDR - RTC_
BASEADDR - SAI1_
BASEADDR - SDIO_
BASEADDR - SPI1_
BASEADDR - SPI2_
BASEADDR - SPI3_
BASEADDR - SPI4_
BASEADDR - SPI5_
BASEADDR - SPI6_
BASEADDR - SYSCFG_
BASEADDR - TIM1_
BASEADDR - TIM2_
BASEADDR - TIM3_
BASEADDR - TIM4_
BASEADDR - TIM5_
BASEADDR - TIM6_
BASEADDR - TIM7_
BASEADDR - TIM8_
BASEADDR - TIM9_
BASEADDR - TIM10_
BASEADDR - TIM11_
BASEADDR - TIM12_
BASEADDR - TIM13_
BASEADDR - TIM14_
BASEADDR - UART4_
BASEADDR - UART5_
BASEADDR - UART7_
BASEADDR - UART8_
BASEADDR - USAR
T1_ BASEADDR - USAR
T2_ BASEADDR - USAR
T3_ BASEADDR - USAR
T6_ BASEADDR - USB_
OTG_ FS_ BASEADDR - USB_
OTG_ HS_ BASEADDR - WWDG_
BASEADDR