License

The VHDL Digital Design Samples project is released under the MIT License.

MIT License

Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the “Software”), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions:

The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.

THE SOFTWARE IS PROVIDED “AS IS”, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

What This Means

You are free to:

✅ Use the code for personal, educational, or commercial purposes
✅ Modify the VHDL designs for your own projects
✅ Distribute the original or modified code
✅ Include in proprietary software projects
✅ Sublicense under different terms

Requirements:

📄 Include the license notice in copies of the software
📄 Include the copyright notice

Limitations:

❌ No warranty - software is provided “as is”
❌ No liability - authors not responsible for issues
❌ No trademark rights - license doesn’t grant trademark use

Educational Use

This project is designed for educational purposes. Students, educators, and learning institutions are encouraged to:

Use the code in coursework and assignments
Modify designs for learning exercises
Build upon the examples for projects
Share improvements with the community

Attribution

While not required by the MIT License, attribution is appreciated:

Based on VHDL Digital Design Samples
https://github.com/shishir-dey/vhdl-samples
Copyright (c) 2025 Shishir Dey

Contributing

By contributing to this project, you agree that your contributions will be licensed under the same MIT License.

Dependencies

This project uses the following tools and libraries:

GHDL - GPL-licensed VHDL simulator

Used for compilation and simulation
Not redistributed with this project
Users must install separately

Sphinx and Extensions - Various licenses

Used for documentation generation
Optional dependency
Each extension has its own license

GitHub Actions - GitHub Terms of Service

Used for CI/CD automation
Service provided by GitHub

Third-Party Components

Any third-party VHDL components or designs included in this project will have their licenses clearly marked. Currently, all code is original work by the project contributors.

Questions

If you have questions about licensing or usage rights, please:

Review the full LICENSE file in the repository
Open an issue on GitHub for clarification
Contact the project maintainers

Disclaimer: This license summary is for informational purposes only and is not legal advice. The full MIT License text takes precedence.