stm32_rust_template/driver/i2c/
mod.rs

1//! # I2C Driver
2//!
3//! Provides a hardware abstraction layer for Inter-Integrated Circuit (I2C)
4//! communication on STM32 microcontrollers.
5//!
6//! This module defines the I2C trait and supporting types for master/slave
7//! communication, bus speed configuration, and address handling across
8//! different STM32 families.
9#![allow(dead_code)]
10
11use bitflags::bitflags;
12use core::ops::FnMut;
13
14/// Defines the possible bus speeds for I2C communication.
15#[derive(Debug, Clone, Copy, PartialEq, Eq)]
16pub enum BusSpeed {
17    /// Standard Speed (100kHz)
18    Standard,
19    /// Fast Speed (400kHz)
20    Fast,
21    /// Fast+ Speed (1MHz)
22    FastPlus,
23    /// High Speed (3.4MHz)
24    High,
25}
26
27/// Represents the status of the I2C peripheral.
28#[derive(Debug, Clone, Copy, PartialEq, Eq)]
29pub struct Status {
30    /// Busy flag
31    pub busy: bool,
32    /// Mode: false=Slave, true=Master
33    pub master_mode: bool,
34    /// Direction: false=Transmitter, true=Receiver
35    pub receiving: bool,
36    /// General Call indication
37    pub general_call: bool,
38    /// Master lost arbitration
39    pub arbitration_lost: bool,
40    /// Bus error detected
41    pub bus_error: bool,
42}
43
44bitflags! {
45    /// Represents I2C communication events.
46    #[derive(Debug, Clone, Copy, PartialEq, Eq, PartialOrd, Ord, Hash)]
47    pub struct Event: u32 {
48        /// Master/Slave Transmit/Receive finished
49        const TRANSFER_DONE = (1 << 0);
50        /// Master/Slave Transmit/Receive incomplete
51        const TRANSFER_INCOMPLETE = (1 << 1);
52        /// Addressed as Slave Transmitter
53        const SLAVE_TRANSMIT = (1 << 2);
54        /// Addressed as Slave Receiver
55        const SLAVE_RECEIVE = (1 << 3);
56        /// Address not acknowledged
57        const ADDRESS_NACK = (1 << 4);
58        /// Slave addressed with general call
59        const GENERAL_CALL = (1 << 5);
60        /// Master lost arbitration
61        const ARBITRATION_LOST = (1 << 6);
62        /// Bus error detected
63        const BUS_ERROR = (1 << 7);
64        /// Bus clear finished
65        const BUS_CLEARED = (1 << 8);
66    }
67}
68
69/// A generic error type for the I2C driver, using i32 for error codes.
70pub type Error = i32;
71
72/// A specialized Result type for I2C operations.
73pub type Result<T> = core::result::Result<T, Error>;
74
75/// A trait that defines a standard interface for an I2C driver.
76pub trait I2c<'a> {
77    /// Initializes the I2C peripheral.
78    ///
79    /// The provided callback will be invoked to signal communication events.
80    fn initialize(&mut self, callback: impl FnMut(Event) + 'a) -> Result<()>;
81
82    /// De-initializes the I2C peripheral.
83    fn uninitialize(&mut self) -> Result<()>;
84
85    /// Transmits data as an I2C master.
86    ///
87    /// # Arguments
88    ///
89    /// * `addr` - 7-bit slave address.
90    /// * `data` - The data buffer to transmit.
91    /// * `xfer_pending` - If true, a STOP condition is not generated after the transfer,
92    ///                    allowing for a subsequent transfer to the same or different device.
93    fn master_transmit(&mut self, addr: u32, data: &[u8], xfer_pending: bool) -> Result<()>;
94
95    /// Receives data as an I2C master.
96    ///
97    /// # Arguments
98    ///
99    /// * `addr` - 7-bit slave address.
100    /// * `data` - A mutable buffer to store the received data.
101    /// * `xfer_pending` - If true, a repeated START is generated after the transfer,
102    ///                    instead of a STOP condition.
103    fn master_receive(&mut self, addr: u32, data: &mut [u8], xfer_pending: bool) -> Result<()>;
104
105    /// Transmits data as an I2C slave.
106    fn slave_transmit(&mut self, data: &[u8]) -> Result<()>;
107
108    /// Receives data as an I2C slave.
109    fn slave_receive(&mut self, data: &mut [u8]) -> Result<()>;
110
111    /// Gets the number of bytes transferred in the last transaction.
112    fn get_data_count(&self) -> Result<u32>;
113
114    /// Sets the bus speed for the I2C communication.
115    fn set_bus_speed(&mut self, speed: BusSpeed) -> Result<()>;
116
117    /// Sets the slave address for the I2C peripheral when in slave mode.
118    fn set_own_address(&mut self, address: u32) -> Result<()>;
119
120    /// Initiates a bus clear operation.
121    fn clear_bus(&mut self) -> Result<()>;
122
123    /// Aborts an ongoing I2C transfer.
124    fn abort_transfer(&mut self) -> Result<()>;
125
126    /// Gets the current status of the I2C peripheral.
127    fn get_status(&self) -> Status;
128}
129
130#[cfg(feature = "stm32f407")]
131pub mod stm32f407;
132
133#[cfg(feature = "stm32f401")]
134pub mod stm32f401;
135
136#[cfg(feature = "stm32f411")]
137pub mod stm32f411;
138
139#[cfg(feature = "stm32f103")]
140pub mod stm32f103;
stm32_rust_template/driver/i2c/mod.rs

stm32_rust_template/driver/i2c/
mod.rs
